The Microelectronics Energy Efficiency Research Center for Advanced Technologies (MEERCAT) is one of the U.S. Department of Energy (DOE) Microelectronics Science Research Centers (MSRCs) established under the CHIPS and Science Act. MEERCAT focuses on advancing the foundational science and technology needed for the next generation of energy-efficient microelectronics and intelligent computing systems. MEERCAT brings together national laboratories, universities, and interdisciplinary researchers to develop transformative innovations spanning materials, devices, architectures, and manufacturing approaches for future microelectronics. The center emphasizes integrated co-design across the entire information-processing chain, including sensing, data transport, edge computing, artificial intelligence, neuromorphic systems, and high-performance computing. A central goal of MEERCAT is to address the rapidly increasing energy demands of modern computing driven by AI, advanced sensing, and data-intensive technologies. Research within the center explores emerging materials, heterogeneous integration, novel device concepts, in-memory and in-transit computing, and advanced fabrication and characterization techniques to enable scalable, sustainable, and highly energy-efficient information processing systems. The MEERCAT program supports collaborative, multidisciplinary research efforts across DOE national laboratories and academic institutions, with strong emphasis on translating fundamental discoveries into enabling technologies for future microelectronics platforms relevant to scientific computing, energy systems, and national security applications.
Session Topics:
Functional materials for next-generation microelectronics
Advanced packaging and heterogeneous integration
Materials and devices for energy-efficient computing, ai, and neuromorphic hardware
Co-design of materials, devices, architectures, and algorithms
Intelligent sensing: Materials, fabrication, modeling, and optimization of sensors and detectors
Advanced characterization, metrology, and multi-scale modeling for microelectronics
CMOS+X technologies: Design, integration, simulation, and system-level demonstrations
Symposium Organizer(s):
Aiping Chen, Center for Integrated Nanotechnologies, Los Alamos National Laboratory, USA
Arianna Gleason-Holbrook, SLAC National Accelerator Laboratory, Stanford University, USA
Jeffrey Nelson, Center for Integrated Nanotechnologies, Los Alamos National Laboratory, USA
Tzu-Ming Lu, Sandia National Laboratories USA
Grant Johnson, Pacific Northwest National Laboratory, USA
Point(s) of Contact:
Aiping Chen; apchen@lanl.gov
Arianna Gleason-Holbrook; ariannag@stanford.edu
Jeffrey Nelson; jsnelson0630@gmail.com
Tzu-Ming Lu; tlu@sandia.gov
Grant Johnson; grant.Johnson@pnnl.gov
Division Sponsor(s):
Basic Science Division
Electronics Division
ACerS Spring Meeting 2027
May 23 • 28, 2027